EE331L Analog Electronics II
A Discrete Amplifier Buffer
You have already become very familiar with opamp circuits. The internal workings of the opamp however, may still be a mystery. In this lab you will build your own discrete component amplifier to use as a buffer amplifier. The result should provide much of the capability of an opamp circuit.
§ Design, simulate and test an amplifier to be used as a buffer between an input voltage signal (the function generator), and the output stage (an A-B push/pull like your first amplifier) of a high frequency signal, at least good enough for audio level signals.
§ You may use your own design and may choose from any components present in the teaching lab, but all transistors should be BJTs (No more than 20 total).
§ Use current mirrors to provide the DC bias for your “opamp” stage(s)
§ The input signal will be a Sinusoid with 5Vpp from the function generator.
§ Your output stage can be a simple A-B power amplifier stage.
§ Your circuit must output a unity gain signal capable of driving a maximum 50 Ohm load resistor (8 Ohms would be a speaker).
§ Use the function generator and oscilloscope to capture test waveforms from your amplifier before the competition.
§ Your goal is to minimize total harmonic distortion in the buffer stage.
§ Once you have built your circuit to your satisfaction, you will test your circuit.
For a 5Vpp output voltage you should drive a 50-ohm
resistor, with unity gain and less than 5%
Determine the performance of your circuit when
driven at 5Vpp, 1kHz and driving the lowest load resistance possible without
Analysis and Report:
Please complete a brief lab report (2-3 pages). Focus on explaining your design process. Explain how you chose the overall circuit design and the key components. Explain the important parameters and effects of your circuit, as well as how it could be improved in the future, or with more resources. Your report should address the following:
§ Circuit Diagram
§ Waveforms (both simulated and measured)
§ Frequency Response, slew rate, loading, etc.
§ Power considerations
Your lab report will be due in one week.